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Atmel ATA8201 ASK/FSK接收器方案

2008-01-25      嵌入式在线      收藏 | 打印

       Atmel 公司的ATA8201和ATA8201是UHF  ASK/FSK 接收器,它的功耗很低,ATA8202的工作频率从433 MHz 到 435 MHz,而ATA8201 的工作频率从 313 MHz 到317 MHz。

        器件集成了具有方案低相位噪音的 VCO, PLL以及回路滤波器,ASK/FSK的接收灵敏度高达–105 dBm,广泛用在消费电子和工业市场的遥控系统,接入控制系统,家庭自动化和娱乐,玩具以及论胎监视系统等。

        本文介绍了ATA8201和ATA8201的主要特性,方框图,应用系统方框图以及3V和3V的应用电路图。

        UHF ASK/FSK Receiver ATA8201/ ATA8202

       The ATA8201/ATA8202 is a UHF ASK/FSK transparent receiver IC with low power consumption
       supplied in a small QFN24 package (body 5 mm 5 mm, pitch 0.65 mm). ATA8202 is used in
the 433 MHz to 435 MHz band of operation, and ATA8201 in 313 MHz to 317 MHz.

       For improved image rejection and selectivity, the IF frequency is fixed to 440 kHz. The IF block
       uses an 8th-order band pass yielding a receive bandwidth of 420 kHz. This enables the use of
       the receiver in both SAW- and PLL-based transmitter systems utilizing various types of data-bit
       encoding such as pulse width modulation, Manchester modulation, variable pulse modulation,
       pulse position modulation, and NRZ. Prevailing encryption protocols such as Keeloq® are easily
       supported due to the receiver’s ability to hold the current data slicer threshold for up to 52 ms
       when incoming RF telegrams contain a blanking interval. This feature eliminates erroneous
       noise from appearing on the demodulated data output pin, and simplifies software decoding
       algorithms. The decoding of the data stream must be carried out by a connected microcontroller
       device. Because of the highly integrated design, the only required RF components are for the
       purpose of receiver antenna matching.
       ATA8201 and ATA8202 support Manchester bit rates of 1 Kbit/s to 10 Kbits/s in ASK and 1 Kbit/s
       to 20 Kbits/s in FSK mode. The four discrete bit rate passbands are selectable and cover
       1.0 Kbit/s to 2.5 Kbits/s, 2.0 Kbits/s to 5.0 Kbits/s, 4.0 Kbits/s to 10.0 Kbits/s, and 8.0 Kbits/s to
       10.0 Kbits/s or 20.0 Kbits/s (for ASK or FSK, respectively). The receiver contains an RSSI output
       to provide an indication of received signal strength and a SENSE input to allow the customer to
       select a threshold below which the DATA signal is gated off. ASK/FSK and bit rate ranges are
       selected by the connected microcontroller device via pins ASK_NFSK, BR0, and BR1.

       主要特性:

       Transparent RF Receiver ICs for 315 MHz (ATA8201) and 433.92 MHz (ATA8202) With High Receiving Sensitivity
       Fully Integrated PLL With Low Phase Noise VCO, PLL, and Loop Filter
High FSK/ASK Sensitivity:–105 dBm (ATA8201, FSK, 9.6 Kbits/s, Manchester, BER 10-3)
       114 dBm (ATA8201, ASK, 2.4 Kbits/s, Manchester, BER 10-3)
       104 dBm (ATA8202, FSK, 9.6 Kbits/s, Manchester, BER 10-3)
       113 dBm (ATA8202, ASK, 2.4 Kbits/s, Manchester, BER 10-3)
       Supply Current: 6.5 mA in Active Mode (3V, 25°C, ASK Mode)
       Data Rate: 1 Kbit/s to 10 Kbits/s Manchester ASK, 1 Kbit/s to 20 Kbits/s Manchester FSK With Four Programmable Bit Rate Ranges
Switching Between Modulation Types ASK/FSK and Different Data Rates Possible in
≤1 ms Typically, Without Hardware Modification on Board to Allow Different Modulation Schemes

       Low Standby Current: 50 μA at 3V, 25°C
       ASK/FSK Receiver Uses a Low-IF Architecture With High Selectivity, Blocking, and Low Intermodulation (Typical 3-dB Blocking 68.0 dBC at ±3 MHz/74.0 dBC at ±20.0 MHz, System I1dBCP = –31 dBm/System IIP3 = –24 dBm)

       Telegram Pause Up to 52 ms Supported in ASK Mode
Wide Bandwidth AGC to Handle Large Out-of-band Blockers above the System I1dBCP
440-kHz IF Frequency With 30-dB Image Rejection and 420-kHz IF Bandwidth to Support PLL Transmitters With Standard Crystals or SAW-based Transmitters

       RSSI (Received Signal Strength Indicator) With Output Signal Dynamic Range of 65 dBLow In-band Sensitivity Change of Typically ±2.0 dB Within ±160-kHz Center
Frequency Change in the Complete Temperature and Supply Voltage Range
Sophisticated Threshold Control and Quasi-peak Detector Circuit in the Data Slicer
Fast and Stable XTO Start-up Circuit (> –1.4 kWorst-case Start Impedance)
       Clock Generation for Microcontroller
       ESD Protection at all Pins (±4 kV HBM, ±200V MM, ±500V FCDM)
       Dual Supply Voltage Range: 2.7V to 3.3V or 4.5V to 5.5V
       Temperature Range: –40°C to +85°C
       Small 5 mm 5 mm QFN24 Package

       应用:
       Industrial/Aftermarket Keyless Entry and Tire Pressure Monitoring Systems
       Alarm, Telemetering and Energy Metering Systems
       Remote Control Systems for Consumer and Industrial Markets
       Access Control Systems
       Home Automation
       Home Entertainment
       Toys



图1。ATA8201/2方框图


图2。ATA8201/2系统方框图




图3。ATA8201/2 3V应用电路图



图4ATA8201/2 5V应用电路图

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